<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.0">
<drawing>
<library>
<description>&lt;b&gt;GENNUM&lt;/b&gt;&lt;p&gt;
http://www.gennum.com/video/pdf/37184DOC.pdf</description>
<packages>
<package name="QFN16-4X4">
<description>&lt;b&gt;QFN-16&lt;/b&gt; 4x4 mm&lt;p&gt;
Source: http://www.gennum.com/video/pdf/37184DOC.pdf</description>
</package>
<package name="QFN64-9X9">
<description>&lt;b&gt;QFN64-9X9&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/36655DOC.pdf</description>
</package>
<package name="QFN40-6X6">
<description>&lt;b&gt;QFN40&lt;/b&gt; 6x6 mm&lt;p&gt;
Source: http://www.gennum.com/video/pdf/39145DOC.pdf</description>
</package>
<package name="LBGA100">
<description>&lt;b&gt; LBGA&lt;/b&gt; 11mm x 11mm 100-Ball&lt;p&gt;
Source: http://www.gennum.com/video/pdf/47478DOC.pdf</description>
</package>
</packages>
<symbols>
<symbol name="GS2974">
<pin name="VEE_A@1" direction="pwr"/>
<pin name="VEE_A@2" direction="pwr"/>
<pin name="SDI" direction="in"/>
<pin name="!SDI" direction="in"/>
<pin name="AGC" direction="pas"/>
<pin name="!AGC" direction="pas"/>
<pin name="BYPASS" direction="in"/>
<pin name="MCLADJ" direction="in"/>
<pin name="VEE_D" direction="pwr"/>
<pin name="!SDO" direction="out"/>
<pin name="SDO" direction="out"/>
<pin name="VCC_D" direction="pwr"/>
<pin name="VCC_E@1" direction="pwr"/>
<pin name="MUTE" direction="in"/>
<pin name="!CD" direction="out"/>
<pin name="VCC_A" direction="pwr"/>
<pin name="EXP" direction="pwr"/>
</symbol>
<symbol name="GS4911B">
<pin name="LOCK_LOST" direction="out"/>
<pin name="REF_LOST" direction="out"/>
<pin name="VID_PLL_VDD" direction="pwr"/>
<pin name="VID_PLL_GND" direction="pwr"/>
<pin name="XTAL_VDD" direction="pwr"/>
<pin name="X1" direction="in"/>
<pin name="X2" direction="out"/>
<pin name="XTAL_GND" direction="pwr"/>
<pin name="CORE_GND" direction="pwr"/>
<pin name="AVDD" direction="pwr"/>
<pin name="NC" direction="nc"/>
<pin name="AGND" direction="pwr"/>
<pin name="AUD_PLL_GND" direction="pwr"/>
<pin name="AUD_PLL_VDD" direction="pwr"/>
<pin name="10FID" direction="in"/>
<pin name="HSYNC" direction="in"/>
<pin name="VSYNC" direction="in"/>
<pin name="IO_VDD" direction="pwr"/>
<pin name="FSYNC" direction="in"/>
<pin name="NC@1" direction="nc"/>
<pin name="VID_STD0" direction="in"/>
<pin name="VID_STD1" direction="in"/>
<pin name="VID_STD2" direction="in"/>
<pin name="VID_STD3" direction="in"/>
<pin name="VID_STD4" direction="in"/>
<pin name="CORE_VDD" direction="pwr"/>
<pin name="VID_STD5" direction="in"/>
<pin name="ACLK1" direction="out"/>
<pin name="ACLK2" direction="out"/>
<pin name="ACLK3" direction="out"/>
<pin name="IO_VDD@1" direction="pwr"/>
<pin name="ASR_SEL2" direction="in"/>
<pin name="ASR_SEL1" direction="in"/>
<pin name="ASR_SEL0" direction="in"/>
<pin name="TIMING_OUT_1" direction="out"/>
<pin name="TIMING_OUT_2" direction="out"/>
<pin name="TIMING_OUT_3" direction="out"/>
<pin name="IO_VDD@2" direction="pwr"/>
<pin name="TIMING_OUT_4" direction="out"/>
<pin name="TIMING_OUT_5" direction="out"/>
<pin name="TIMING_OUT_6" direction="out"/>
<pin name="TIMING_OUT_7" direction="out"/>
<pin name="TIMING_OUT_8" direction="out"/>
<pin name="CORE_VDD@1" direction="pwr"/>
<pin name="LVDS/PCLK3_VDD" direction="pwr"/>
<pin name="!PCLK3" direction="out"/>
<pin name="PCLK3" direction="out"/>
<pin name="LVDS/PCLK3_GND" direction="pwr"/>
<pin name="PCLK2" direction="out"/>
<pin name="IO_VDD@3" direction="pwr"/>
<pin name="PCLK1" direction="out"/>
<pin name="PCLK1&amp;2_GND" direction="pwr"/>
<pin name="PCLK1&amp;2_VDD" direction="pwr"/>
<pin name="PHS_VDD" direction="pwr"/>
<pin name="PHS_GND" direction="pwr"/>
<pin name="JTAG/!HOST" direction="in"/>
<pin name="SCLK_TCLK" direction="in"/>
<pin name="SDIN_TDI" direction="in"/>
<pin name="SDOUT_TDO" direction="out"/>
<pin name="!CS!_TMS" direction="in"/>
<pin name="!RESET" direction="in"/>
<pin name="IO_VDD@4" direction="pwr"/>
<pin name="NC@2" direction="nc"/>
<pin name="!GENCLOCK" direction="in"/>
</symbol>
<symbol name="GS4910B">
<pin name="LOCK_LOST" direction="out"/>
<pin name="REF_LOST" direction="out"/>
<pin name="VID_PLL_VDD" direction="pwr"/>
<pin name="VID_PLL_GND" direction="pwr"/>
<pin name="XTAL_VDD" direction="pwr"/>
<pin name="X1" direction="in"/>
<pin name="X2" direction="out"/>
<pin name="XTAL_GND" direction="pwr"/>
<pin name="CORE_GND" direction="pwr"/>
<pin name="AVDD" direction="pwr"/>
<pin name="NC" direction="nc"/>
<pin name="AGND" direction="pwr"/>
<pin name="AUD_PLL_GND" direction="pwr"/>
<pin name="AUD_PLL_VDD" direction="pwr"/>
<pin name="10FID" direction="in"/>
<pin name="HSYNC" direction="in"/>
<pin name="VSYNC" direction="in"/>
<pin name="IO_VDD" direction="pwr"/>
<pin name="FSYNC" direction="in"/>
<pin name="NC@1" direction="nc"/>
<pin name="VID_STD0" direction="in"/>
<pin name="VID_STD1" direction="in"/>
<pin name="VID_STD2" direction="in"/>
<pin name="VID_STD3" direction="in"/>
<pin name="VID_STD4" direction="in"/>
<pin name="CORE_VDD" direction="pwr"/>
<pin name="VID_STD5" direction="in"/>
<pin name="NC@2" direction="nc"/>
<pin name="NC@3" direction="nc"/>
<pin name="NC@4" direction="nc"/>
<pin name="IO_VDD@1" direction="pwr"/>
<pin name="AGND@1" direction="pwr"/>
<pin name="AGND@2" direction="pwr"/>
<pin name="AGND@3" direction="pwr"/>
<pin name="TIMING_OUT_1" direction="out"/>
<pin name="TIMING_OUT_2" direction="out"/>
<pin name="TIMING_OUT_3" direction="out"/>
<pin name="IO_VDD@2" direction="pwr"/>
<pin name="TIMING_OUT_4" direction="out"/>
<pin name="TIMING_OUT_5" direction="out"/>
<pin name="TIMING_OUT_6" direction="out"/>
<pin name="TIMING_OUT_7" direction="out"/>
<pin name="TIMING_OUT_8" direction="out"/>
<pin name="CORE_VDD@1" direction="pwr"/>
<pin name="LVDS/PCLK3_VDD" direction="pwr"/>
<pin name="!PCLK3" direction="out"/>
<pin name="PCLK3" direction="out"/>
<pin name="LVDS/PCLK3_GND" direction="pwr"/>
<pin name="PCLK2" direction="out"/>
<pin name="IO_VDD@3" direction="pwr"/>
<pin name="PCLK1" direction="out"/>
<pin name="PCLK1&amp;2_GND" direction="pwr"/>
<pin name="PCLK1&amp;2_VDD" direction="pwr"/>
<pin name="PHS_VDD" direction="pwr"/>
<pin name="PHS_GND" direction="pwr"/>
<pin name="JTAG/!HOST" direction="in"/>
<pin name="SCLK_TCLK" direction="in"/>
<pin name="SDIN_TDI" direction="in"/>
<pin name="SDOUT_TDO" direction="out"/>
<pin name="!CS!_TMS" direction="in"/>
<pin name="!RESET" direction="in"/>
<pin name="IO_VDD@4" direction="pwr"/>
<pin name="NC@5" direction="nc"/>
<pin name="!GENCLOCK" direction="in"/>
</symbol>
<symbol name="GS4915">
<pin name="REG_VDD" direction="pwr"/>
<pin name="AGND" direction="pwr"/>
<pin name="PD_VDD" direction="pwr"/>
<pin name="CLKIN" direction="in"/>
<pin name="!CLKIN" direction="in"/>
<pin name="AGND@1" direction="pwr"/>
<pin name="IN_VDD" direction="pwr"/>
<pin name="CLKIN_SE" direction="in"/>
<pin name="AGND@2" direction="pwr"/>
<pin name="RESET" direction="in"/>
<pin name="IPSEL" direction="in"/>
<pin name="GND" direction="pwr"/>
<pin name="BYPASS" direction="in"/>
<pin name="AUTOBYPASS" direction="in"/>
<pin name="D_VDD" direction="pwr"/>
<pin name="FCTRL0" direction="in"/>
<pin name="FCTRL1" direction="in"/>
<pin name="DOUBLE" direction="in"/>
<pin name="SKEW_EN" direction="in"/>
<pin name="GND@1" direction="pwr"/>
<pin name="LOCK" direction="out"/>
<pin name="GND@2" direction="pwr"/>
<pin name="SE_VDD" direction="pwr"/>
<pin name="CLKOUT_SE" direction="out"/>
<pin name="D_VDD@1" direction="pwr"/>
<pin name="AGND@3" direction="pwr"/>
<pin name="DIFF_OUT_VDD" direction="pwr"/>
<pin name="!CLKOUT" direction="out"/>
<pin name="CLKOUT" direction="out"/>
<pin name="AGND@4" direction="pwr"/>
<pin name="AGND@5" direction="pwr"/>
<pin name="DIV_VDD" direction="pwr"/>
<pin name="VCO" direction="in"/>
<pin name="!VCO" direction="in"/>
<pin name="VCO_GND" direction="pwr"/>
<pin name="LF" direction="in"/>
<pin name="CP_RES" direction="in"/>
<pin name="CP_VDD" direction="pwr"/>
<pin name="VCO_VDD" direction="pwr"/>
<pin name="AGND@6" direction="pwr"/>
</symbol>
<symbol name="GS2970">
<pin name="VBG" direction="in"/>
<pin name="LF" direction="in"/>
<pin name="LB_CONT" direction="in"/>
<pin name="VCO_VDD" direction="pwr"/>
<pin name="STAT0" direction="out"/>
<pin name="STAT1" direction="out"/>
<pin name="IO_VDD" direction="pwr"/>
<pin name="PCLK" direction="out"/>
<pin name="DOUT18" direction="out"/>
<pin name="DOUT17" direction="out"/>
<pin name="A_VDD" direction="pwr"/>
<pin name="PLL_VDD" direction="pwr"/>
<pin name="RSV" direction="nc"/>
<pin name="VCO_GND" direction="pwr"/>
<pin name="STAT2" direction="out"/>
<pin name="STAT3" direction="out"/>
<pin name="IO_GND" direction="pwr"/>
<pin name="DOUT19" direction="out"/>
<pin name="DOUT16" direction="out"/>
<pin name="DOUT15" direction="out"/>
<pin name="SDI" direction="in"/>
<pin name="A_GND" direction="pwr"/>
<pin name="PLL_VDD@1" direction="pwr"/>
<pin name="PLL_VDD@2" direction="pwr"/>
<pin name="STAT4" direction="out"/>
<pin name="STAT5" direction="out"/>
<pin name="!RESET_TRSTIN" direction="out"/>
<pin name="DOUT12" direction="out"/>
<pin name="DOUT14" direction="out"/>
<pin name="DOUT13" direction="out"/>
<pin name="!SDI" direction="in"/>
<pin name="A_GND@1" direction="pwr"/>
<pin name="A_GND@2" direction="pwr"/>
<pin name="PLL_GND" direction="pwr"/>
<pin name="CORE_GND" direction="pwr"/>
<pin name="CORE_VDD" direction="pwr"/>
<pin name="SW_EN" direction="in"/>
<pin name="JTAG/!HOST" direction="in"/>
<pin name="IO_GND@1" direction="pwr"/>
<pin name="IO_VDD@1" direction="pwr"/>
<pin name="SDI_VDD" direction="pwr"/>
<pin name="SDI_GND" direction="pwr"/>
<pin name="A_GND@3" direction="pwr"/>
<pin name="PLL_GND@1" direction="pwr"/>
<pin name="CORE_GND@1" direction="pwr"/>
<pin name="CORE_VDD@1" direction="pwr"/>
<pin name="SDOUT_TDO" direction="out"/>
<pin name="SDIN_TDIIN" direction="out"/>
<pin name="DOUT10" direction="out"/>
<pin name="DOUT11" direction="out"/>
<pin name="TERM" direction="in"/>
<pin name="RSV@1" direction="nc"/>
<pin name="A_GND@4" direction="pwr"/>
<pin name="PLL_GND@2" direction="pwr"/>
<pin name="CORE_GND@2" direction="pwr"/>
<pin name="CORE_VDD@2" direction="pwr"/>
<pin name="!CS!_TMS" direction="in"/>
<pin name="SCLK_TCK" direction="in"/>
<pin name="DOUT8" direction="out"/>
<pin name="DOUT9" direction="out"/>
<pin name="RSV@2" direction="nc"/>
<pin name="RSV@3" direction="nc"/>
<pin name="!RC_BYP" direction="in"/>
<pin name="RSV@4" direction="nc"/>
<pin name="CORE_GND@3" direction="pwr"/>
<pin name="CORE_VDD@3" direction="pwr"/>
<pin name="!SMPTE_BYPASS"/>
<pin name="DVB_ASI"/>
<pin name="IO_GND@2" direction="pwr"/>
<pin name="IO_VDD@2" direction="pwr"/>
<pin name="BUFF_VDD" direction="pwr"/>
<pin name="BUFF_GND" direction="pwr"/>
<pin name="AUDIO_EN/!DIS" direction="in"/>
<pin name="WCLK" direction="out"/>
<pin name="TIM_861" direction="in"/>
<pin name="XTAL_OUT" direction="out"/>
<pin name="20BIT/10BIT" direction="in"/>
<pin name="IOPROC_EN/!DIS" direction="in"/>
<pin name="DOUT6" direction="out"/>
<pin name="DOUT7" direction="out"/>
<pin name="SDO" direction="out"/>
<pin name="SDO_EN/!DIS" direction="in"/>
<pin name="AOUT_1/2" direction="out"/>
<pin name="ACLK" direction="out"/>
<pin name="AOUT_5/6" direction="out"/>
<pin name="XTAL2" direction="in"/>
<pin name="IO_GND@3" direction="pwr"/>
<pin name="DOUT1" direction="out"/>
<pin name="DOUT4" direction="out"/>
<pin name="DOUT5" direction="out"/>
<pin name="!SDO" direction="out"/>
<pin name="STANDBY" direction="in"/>
<pin name="AOUT_3/4" direction="out"/>
<pin name="AMCLK" direction="out"/>
<pin name="AOUT_7/8" direction="out"/>
<pin name="XTAL1" direction="in"/>
<pin name="IO_VDD@3" direction="pwr"/>
<pin name="DOUT0" direction="out"/>
<pin name="DOUT2" direction="out"/>
<pin name="DOUT3" direction="out"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="GS2974" prefix="IC">
<description>&lt;b&gt;Adaptive Cable Equalizer&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/37184DOC.pdf</description>
<gates>
<gate name="G$1" symbol="GS2974"/>
</gates>
<devices>
<device name="" package="QFN16-4X4">
<connects>
<connect gate="G$1" pin="!AGC" pad="6"/>
<connect gate="G$1" pin="!CD" pad="15"/>
<connect gate="G$1" pin="!SDI" pad="3"/>
<connect gate="G$1" pin="!SDO" pad="10"/>
<connect gate="G$1" pin="AGC" pad="5"/>
<connect gate="G$1" pin="BYPASS" pad="7"/>
<connect gate="G$1" pin="EXP" pad="EXP"/>
<connect gate="G$1" pin="MCLADJ" pad="8"/>
<connect gate="G$1" pin="MUTE" pad="14"/>
<connect gate="G$1" pin="SDI" pad="2"/>
<connect gate="G$1" pin="SDO" pad="11"/>
<connect gate="G$1" pin="VCC_A" pad="16"/>
<connect gate="G$1" pin="VCC_D" pad="13"/>
<connect gate="G$1" pin="VCC_E@1" pad="12"/>
<connect gate="G$1" pin="VEE_A@1" pad="1"/>
<connect gate="G$1" pin="VEE_A@2" pad="4"/>
<connect gate="G$1" pin="VEE_D" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value="GS2974ACNE3"/>
<attribute name="OC_FARNELL" value="1603763"/>
<attribute name="OC_NEWARK" value="12N2242"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="GS4911B" prefix="IC">
<description>&lt;b&gt;HD/SD/Graphics Clock and Timing Generator with GENLOCK&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/36655DOC.pdf</description>
<gates>
<gate name="G$1" symbol="GS4911B"/>
</gates>
<devices>
<device name="" package="QFN64-9X9">
<connects>
<connect gate="G$1" pin="!CS!_TMS" pad="60"/>
<connect gate="G$1" pin="!GENCLOCK" pad="64"/>
<connect gate="G$1" pin="!PCLK3" pad="46"/>
<connect gate="G$1" pin="!RESET" pad="61"/>
<connect gate="G$1" pin="10FID" pad="15"/>
<connect gate="G$1" pin="ACLK1" pad="28"/>
<connect gate="G$1" pin="ACLK2" pad="29"/>
<connect gate="G$1" pin="ACLK3" pad="30"/>
<connect gate="G$1" pin="AGND" pad="12"/>
<connect gate="G$1" pin="ASR_SEL0" pad="34"/>
<connect gate="G$1" pin="ASR_SEL1" pad="33"/>
<connect gate="G$1" pin="ASR_SEL2" pad="32"/>
<connect gate="G$1" pin="AUD_PLL_GND" pad="13"/>
<connect gate="G$1" pin="AUD_PLL_VDD" pad="14"/>
<connect gate="G$1" pin="AVDD" pad="10"/>
<connect gate="G$1" pin="CORE_GND" pad="9"/>
<connect gate="G$1" pin="CORE_VDD" pad="26"/>
<connect gate="G$1" pin="CORE_VDD@1" pad="44"/>
<connect gate="G$1" pin="FSYNC" pad="19"/>
<connect gate="G$1" pin="HSYNC" pad="16"/>
<connect gate="G$1" pin="IO_VDD" pad="18"/>
<connect gate="G$1" pin="IO_VDD@1" pad="31"/>
<connect gate="G$1" pin="IO_VDD@2" pad="38"/>
<connect gate="G$1" pin="IO_VDD@3" pad="50"/>
<connect gate="G$1" pin="IO_VDD@4" pad="62"/>
<connect gate="G$1" pin="JTAG/!HOST" pad="56"/>
<connect gate="G$1" pin="LOCK_LOST" pad="1"/>
<connect gate="G$1" pin="LVDS/PCLK3_GND" pad="48"/>
<connect gate="G$1" pin="LVDS/PCLK3_VDD" pad="45"/>
<connect gate="G$1" pin="NC" pad="11"/>
<connect gate="G$1" pin="NC@1" pad="20"/>
<connect gate="G$1" pin="NC@2" pad="63"/>
<connect gate="G$1" pin="PCLK1" pad="51"/>
<connect gate="G$1" pin="PCLK1&amp;2_GND" pad="52"/>
<connect gate="G$1" pin="PCLK1&amp;2_VDD" pad="53"/>
<connect gate="G$1" pin="PCLK2" pad="49"/>
<connect gate="G$1" pin="PCLK3" pad="47"/>
<connect gate="G$1" pin="PHS_GND" pad="55"/>
<connect gate="G$1" pin="PHS_VDD" pad="54"/>
<connect gate="G$1" pin="REF_LOST" pad="2"/>
<connect gate="G$1" pin="SCLK_TCLK" pad="57"/>
<connect gate="G$1" pin="SDIN_TDI" pad="58"/>
<connect gate="G$1" pin="SDOUT_TDO" pad="59"/>
<connect gate="G$1" pin="TIMING_OUT_1" pad="35"/>
<connect gate="G$1" pin="TIMING_OUT_2" pad="36"/>
<connect gate="G$1" pin="TIMING_OUT_3" pad="37"/>
<connect gate="G$1" pin="TIMING_OUT_4" pad="39"/>
<connect gate="G$1" pin="TIMING_OUT_5" pad="40"/>
<connect gate="G$1" pin="TIMING_OUT_6" pad="41"/>
<connect gate="G$1" pin="TIMING_OUT_7" pad="42"/>
<connect gate="G$1" pin="TIMING_OUT_8" pad="43"/>
<connect gate="G$1" pin="VID_PLL_GND" pad="4"/>
<connect gate="G$1" pin="VID_PLL_VDD" pad="3"/>
<connect gate="G$1" pin="VID_STD0" pad="21"/>
<connect gate="G$1" pin="VID_STD1" pad="22"/>
<connect gate="G$1" pin="VID_STD2" pad="23"/>
<connect gate="G$1" pin="VID_STD3" pad="24"/>
<connect gate="G$1" pin="VID_STD4" pad="25"/>
<connect gate="G$1" pin="VID_STD5" pad="27"/>
<connect gate="G$1" pin="VSYNC" pad="17"/>
<connect gate="G$1" pin="X1" pad="6"/>
<connect gate="G$1" pin="X2" pad="7"/>
<connect gate="G$1" pin="XTAL_GND" pad="8"/>
<connect gate="G$1" pin="XTAL_VDD" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value="GS4911BCNE3"/>
<attribute name="OC_FARNELL" value="1603771"/>
<attribute name="OC_NEWARK" value="12N2245"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="GS4910B" prefix="IC">
<description>&lt;b&gt;HD/SD/Graphics Clock and Timing Generator with GENLOCK&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/36655DOC.pdf</description>
<gates>
<gate name="G$1" symbol="GS4910B"/>
</gates>
<devices>
<device name="" package="QFN64-9X9">
<connects>
<connect gate="G$1" pin="!CS!_TMS" pad="60"/>
<connect gate="G$1" pin="!GENCLOCK" pad="64"/>
<connect gate="G$1" pin="!PCLK3" pad="46"/>
<connect gate="G$1" pin="!RESET" pad="61"/>
<connect gate="G$1" pin="10FID" pad="15"/>
<connect gate="G$1" pin="AGND" pad="12"/>
<connect gate="G$1" pin="AGND@1" pad="32"/>
<connect gate="G$1" pin="AGND@2" pad="33"/>
<connect gate="G$1" pin="AGND@3" pad="34"/>
<connect gate="G$1" pin="AUD_PLL_GND" pad="13"/>
<connect gate="G$1" pin="AUD_PLL_VDD" pad="14"/>
<connect gate="G$1" pin="AVDD" pad="10"/>
<connect gate="G$1" pin="CORE_GND" pad="9"/>
<connect gate="G$1" pin="CORE_VDD" pad="26"/>
<connect gate="G$1" pin="CORE_VDD@1" pad="44"/>
<connect gate="G$1" pin="FSYNC" pad="19"/>
<connect gate="G$1" pin="HSYNC" pad="16"/>
<connect gate="G$1" pin="IO_VDD" pad="18"/>
<connect gate="G$1" pin="IO_VDD@1" pad="31"/>
<connect gate="G$1" pin="IO_VDD@2" pad="38"/>
<connect gate="G$1" pin="IO_VDD@3" pad="50"/>
<connect gate="G$1" pin="IO_VDD@4" pad="62"/>
<connect gate="G$1" pin="JTAG/!HOST" pad="56"/>
<connect gate="G$1" pin="LOCK_LOST" pad="1"/>
<connect gate="G$1" pin="LVDS/PCLK3_GND" pad="48"/>
<connect gate="G$1" pin="LVDS/PCLK3_VDD" pad="45"/>
<connect gate="G$1" pin="NC" pad="11"/>
<connect gate="G$1" pin="NC@1" pad="20"/>
<connect gate="G$1" pin="NC@2" pad="28"/>
<connect gate="G$1" pin="NC@3" pad="29"/>
<connect gate="G$1" pin="NC@4" pad="30"/>
<connect gate="G$1" pin="NC@5" pad="63"/>
<connect gate="G$1" pin="PCLK1" pad="51"/>
<connect gate="G$1" pin="PCLK1&amp;2_GND" pad="52"/>
<connect gate="G$1" pin="PCLK1&amp;2_VDD" pad="53"/>
<connect gate="G$1" pin="PCLK2" pad="49"/>
<connect gate="G$1" pin="PCLK3" pad="47"/>
<connect gate="G$1" pin="PHS_GND" pad="55"/>
<connect gate="G$1" pin="PHS_VDD" pad="54"/>
<connect gate="G$1" pin="REF_LOST" pad="2"/>
<connect gate="G$1" pin="SCLK_TCLK" pad="57"/>
<connect gate="G$1" pin="SDIN_TDI" pad="58"/>
<connect gate="G$1" pin="SDOUT_TDO" pad="59"/>
<connect gate="G$1" pin="TIMING_OUT_1" pad="35"/>
<connect gate="G$1" pin="TIMING_OUT_2" pad="36"/>
<connect gate="G$1" pin="TIMING_OUT_3" pad="37"/>
<connect gate="G$1" pin="TIMING_OUT_4" pad="39"/>
<connect gate="G$1" pin="TIMING_OUT_5" pad="40"/>
<connect gate="G$1" pin="TIMING_OUT_6" pad="41"/>
<connect gate="G$1" pin="TIMING_OUT_7" pad="42"/>
<connect gate="G$1" pin="TIMING_OUT_8" pad="43"/>
<connect gate="G$1" pin="VID_PLL_GND" pad="4"/>
<connect gate="G$1" pin="VID_PLL_VDD" pad="3"/>
<connect gate="G$1" pin="VID_STD0" pad="21"/>
<connect gate="G$1" pin="VID_STD1" pad="22"/>
<connect gate="G$1" pin="VID_STD2" pad="23"/>
<connect gate="G$1" pin="VID_STD3" pad="24"/>
<connect gate="G$1" pin="VID_STD4" pad="25"/>
<connect gate="G$1" pin="VID_STD5" pad="27"/>
<connect gate="G$1" pin="VSYNC" pad="17"/>
<connect gate="G$1" pin="X1" pad="6"/>
<connect gate="G$1" pin="X2" pad="7"/>
<connect gate="G$1" pin="XTAL_GND" pad="8"/>
<connect gate="G$1" pin="XTAL_VDD" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="unknown"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="GS4915" prefix="IC">
<description>&lt;b&gt;ClockCleaner&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/39145DOC.pdf</description>
<gates>
<gate name="G$1" symbol="GS4915"/>
</gates>
<devices>
<device name="" package="QFN40-6X6">
<connects>
<connect gate="G$1" pin="!CLKIN" pad="5"/>
<connect gate="G$1" pin="!CLKOUT" pad="28"/>
<connect gate="G$1" pin="!VCO" pad="34"/>
<connect gate="G$1" pin="AGND" pad="2"/>
<connect gate="G$1" pin="AGND@1" pad="6"/>
<connect gate="G$1" pin="AGND@2" pad="9"/>
<connect gate="G$1" pin="AGND@3" pad="26"/>
<connect gate="G$1" pin="AGND@4" pad="30"/>
<connect gate="G$1" pin="AGND@5" pad="31"/>
<connect gate="G$1" pin="AGND@6" pad="40"/>
<connect gate="G$1" pin="AUTOBYPASS" pad="14"/>
<connect gate="G$1" pin="BYPASS" pad="13"/>
<connect gate="G$1" pin="CLKIN" pad="4"/>
<connect gate="G$1" pin="CLKIN_SE" pad="8"/>
<connect gate="G$1" pin="CLKOUT" pad="29"/>
<connect gate="G$1" pin="CLKOUT_SE" pad="24"/>
<connect gate="G$1" pin="CP_RES" pad="37"/>
<connect gate="G$1" pin="CP_VDD" pad="38"/>
<connect gate="G$1" pin="DIFF_OUT_VDD" pad="27"/>
<connect gate="G$1" pin="DIV_VDD" pad="32"/>
<connect gate="G$1" pin="DOUBLE" pad="18"/>
<connect gate="G$1" pin="D_VDD" pad="15"/>
<connect gate="G$1" pin="D_VDD@1" pad="25"/>
<connect gate="G$1" pin="FCTRL0" pad="16"/>
<connect gate="G$1" pin="FCTRL1" pad="17"/>
<connect gate="G$1" pin="GND" pad="12"/>
<connect gate="G$1" pin="GND@1" pad="20"/>
<connect gate="G$1" pin="GND@2" pad="22"/>
<connect gate="G$1" pin="IN_VDD" pad="7"/>
<connect gate="G$1" pin="IPSEL" pad="11"/>
<connect gate="G$1" pin="LF" pad="36"/>
<connect gate="G$1" pin="LOCK" pad="21"/>
<connect gate="G$1" pin="PD_VDD" pad="3"/>
<connect gate="G$1" pin="REG_VDD" pad="1"/>
<connect gate="G$1" pin="RESET" pad="10"/>
<connect gate="G$1" pin="SE_VDD" pad="23"/>
<connect gate="G$1" pin="SKEW_EN" pad="19"/>
<connect gate="G$1" pin="VCO" pad="33"/>
<connect gate="G$1" pin="VCO_GND" pad="35"/>
<connect gate="G$1" pin="VCO_VDD" pad="39"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value="GS4915INE3"/>
<attribute name="OC_FARNELL" value="1603770"/>
<attribute name="OC_NEWARK" value="12N2246"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="GS2970" prefix="IC">
<description>&lt;b&gt;3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing&lt;/b&gt;&lt;p&gt;
Source: http://www.gennum.com/video/pdf/47478DOC.pdf</description>
<gates>
<gate name="G$1" symbol="GS2970"/>
</gates>
<devices>
<device name="" package="LBGA100">
<connects>
<connect gate="G$1" pin="!CS!_TMS" pad="F7"/>
<connect gate="G$1" pin="!RC_BYP" pad="G3"/>
<connect gate="G$1" pin="!RESET_TRSTIN" pad="C7"/>
<connect gate="G$1" pin="!SDI" pad="D1"/>
<connect gate="G$1" pin="!SDO" pad="K1"/>
<connect gate="G$1" pin="!SMPTE_BYPASS" pad="G7"/>
<connect gate="G$1" pin="20BIT/10BIT" pad="H7"/>
<connect gate="G$1" pin="ACLK" pad="J4"/>
<connect gate="G$1" pin="AMCLK" pad="K4"/>
<connect gate="G$1" pin="AOUT_1/2" pad="J3"/>
<connect gate="G$1" pin="AOUT_3/4" pad="K3"/>
<connect gate="G$1" pin="AOUT_5/6" pad="J5"/>
<connect gate="G$1" pin="AOUT_7/8" pad="K5"/>
<connect gate="G$1" pin="AUDIO_EN/!DIS" pad="H3"/>
<connect gate="G$1" pin="A_GND" pad="C2"/>
<connect gate="G$1" pin="A_GND@1" pad="D2"/>
<connect gate="G$1" pin="A_GND@2" pad="D3"/>
<connect gate="G$1" pin="A_GND@3" pad="E3"/>
<connect gate="G$1" pin="A_GND@4" pad="F3"/>
<connect gate="G$1" pin="A_VDD" pad="B1"/>
<connect gate="G$1" pin="BUFF_GND" pad="H2"/>
<connect gate="G$1" pin="BUFF_VDD" pad="H1"/>
<connect gate="G$1" pin="CORE_GND" pad="D5"/>
<connect gate="G$1" pin="CORE_GND@1" pad="E5"/>
<connect gate="G$1" pin="CORE_GND@2" pad="F5"/>
<connect gate="G$1" pin="CORE_GND@3" pad="G5"/>
<connect gate="G$1" pin="CORE_VDD" pad="D6"/>
<connect gate="G$1" pin="CORE_VDD@1" pad="E6"/>
<connect gate="G$1" pin="CORE_VDD@2" pad="F6"/>
<connect gate="G$1" pin="CORE_VDD@3" pad="G6"/>
<connect gate="G$1" pin="DOUT0" pad="K8"/>
<connect gate="G$1" pin="DOUT1" pad="J8"/>
<connect gate="G$1" pin="DOUT10" pad="E9"/>
<connect gate="G$1" pin="DOUT11" pad="E10"/>
<connect gate="G$1" pin="DOUT12" pad="C8"/>
<connect gate="G$1" pin="DOUT13" pad="C10"/>
<connect gate="G$1" pin="DOUT14" pad="C9"/>
<connect gate="G$1" pin="DOUT15" pad="B10"/>
<connect gate="G$1" pin="DOUT16" pad="B9"/>
<connect gate="G$1" pin="DOUT17" pad="A10"/>
<connect gate="G$1" pin="DOUT18" pad="A9"/>
<connect gate="G$1" pin="DOUT19" pad="B8"/>
<connect gate="G$1" pin="DOUT2" pad="K9"/>
<connect gate="G$1" pin="DOUT3" pad="K10"/>
<connect gate="G$1" pin="DOUT4" pad="J9"/>
<connect gate="G$1" pin="DOUT5" pad="J10"/>
<connect gate="G$1" pin="DOUT6" pad="H9"/>
<connect gate="G$1" pin="DOUT7" pad="H10"/>
<connect gate="G$1" pin="DOUT8" pad="F9"/>
<connect gate="G$1" pin="DOUT9" pad="F10"/>
<connect gate="G$1" pin="DVB_ASI" pad="G8"/>
<connect gate="G$1" pin="IOPROC_EN/!DIS" pad="H8"/>
<connect gate="G$1" pin="IO_GND" pad="B7"/>
<connect gate="G$1" pin="IO_GND@1" pad="D9"/>
<connect gate="G$1" pin="IO_GND@2" pad="G9"/>
<connect gate="G$1" pin="IO_GND@3" pad="J7"/>
<connect gate="G$1" pin="IO_VDD" pad="A7"/>
<connect gate="G$1" pin="IO_VDD@1" pad="D10"/>
<connect gate="G$1" pin="IO_VDD@2" pad="G10"/>
<connect gate="G$1" pin="IO_VDD@3" pad="K7"/>
<connect gate="G$1" pin="JTAG/!HOST" pad="D8"/>
<connect gate="G$1" pin="LB_CONT" pad="A3"/>
<connect gate="G$1" pin="LF" pad="A2"/>
<connect gate="G$1" pin="PCLK" pad="A8"/>
<connect gate="G$1" pin="PLL_GND" pad="D4"/>
<connect gate="G$1" pin="PLL_GND@1" pad="E4"/>
<connect gate="G$1" pin="PLL_GND@2" pad="F4"/>
<connect gate="G$1" pin="PLL_VDD" pad="B2"/>
<connect gate="G$1" pin="PLL_VDD@1" pad="C3"/>
<connect gate="G$1" pin="PLL_VDD@2" pad="C4"/>
<connect gate="G$1" pin="RSV" pad="B3"/>
<connect gate="G$1" pin="RSV@1" pad="F2"/>
<connect gate="G$1" pin="RSV@2" pad="G1"/>
<connect gate="G$1" pin="RSV@3" pad="G2"/>
<connect gate="G$1" pin="RSV@4" pad="G4"/>
<connect gate="G$1" pin="SCLK_TCK" pad="F8"/>
<connect gate="G$1" pin="SDI" pad="C1"/>
<connect gate="G$1" pin="SDIN_TDIIN" pad="E8"/>
<connect gate="G$1" pin="SDI_GND" pad="E2"/>
<connect gate="G$1" pin="SDI_VDD" pad="E1"/>
<connect gate="G$1" pin="SDO" pad="J1"/>
<connect gate="G$1" pin="SDOUT_TDO" pad="E7"/>
<connect gate="G$1" pin="SDO_EN/!DIS" pad="J2"/>
<connect gate="G$1" pin="STANDBY" pad="K2"/>
<connect gate="G$1" pin="STAT0" pad="A5"/>
<connect gate="G$1" pin="STAT1" pad="A6"/>
<connect gate="G$1" pin="STAT2" pad="B5"/>
<connect gate="G$1" pin="STAT3" pad="B6"/>
<connect gate="G$1" pin="STAT4" pad="C5"/>
<connect gate="G$1" pin="STAT5" pad="C6"/>
<connect gate="G$1" pin="SW_EN" pad="D7"/>
<connect gate="G$1" pin="TERM" pad="F1"/>
<connect gate="G$1" pin="TIM_861" pad="H5"/>
<connect gate="G$1" pin="VBG" pad="A1"/>
<connect gate="G$1" pin="VCO_GND" pad="B4"/>
<connect gate="G$1" pin="VCO_VDD" pad="A4"/>
<connect gate="G$1" pin="WCLK" pad="H4"/>
<connect gate="G$1" pin="XTAL1" pad="K6"/>
<connect gate="G$1" pin="XTAL2" pad="J6"/>
<connect gate="G$1" pin="XTAL_OUT" pad="H6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value="GS2970IBE3"/>
<attribute name="OC_FARNELL" value="1694478"/>
<attribute name="OC_NEWARK" value="56P5062"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
